Cold-source field-effect transistor with type-III band-aligned HfS 2 /WTe 2 heterostructure

The cold source field-effect transistor (CSFET) is promising for reducing power dissipation in integrated circuits by engineering the density of states at the injecting source. Existing CSFET designs utilizing Dirac-source metals or p-Metal-n stacks are challenged by Schottky barriers at the metal-semiconductor interface. In this work, a 2D WTe₂/HfS₂ heterojunction with type-III band alignment is proposed to be an excellent design of cold source and CSFET. The architecture has a high band-to-band transport mechanism by removing the detrimental Schottky barrier issues. Importantly, the proposed CSFET has the same channel barrier modulation principle as conventional MOSFET to enable a high on-state current. Using first-principles-based quantum transport modeling, we predict a very high Iₒₙ/Ioff ratio at ~ 10¹⁰, a low subthreshold swing below the thermal limit for a wide range of gate voltages, reaching as small as 41.3 mV/dec, at low source-drain bias VDS=0.3 V. These findings establish a design principles for next-generation low-power nanoelectronic switches leveraging 2D van der Waals heterostructures.