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Hafnia-based ferroelectric tunnel junctions (FTJs) are promising for post-Moore memories, offering fast, low-power polarization switching and compatibility with the technological maturity of the hafnia platform. Yet nanometer-scale barrier thinning, while desirable for higher speed and energy efficiency, introduces a critical reliability bottleneck. Here, we develop an all-atomic layer deposition (ALD) process for reliable sub-2 nm hafnia FTJs through precise growth and low-roughness interface formation. The resulting devices combine sub-2-V operation with a high breakdown field of ∼12.1 MV/cm, while maintaining stable ferroelectric switching through 1010 cycles without breakdown. Further interface optimization extends the resistance-state endurance toward 1010 cycles, reconciling aggressive barrier scaling with reliable device operation. We further exploit 4-bit nonvolatile multilevel operation to demonstrate an in-memory computing simulation with 95.78% accuracy. By combining the advantages of scaling with high reliability, this work advances hafnia-based FTJs toward high-speed, energy-efficient, and robust memory applications.
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Xue et al. (2026) studied this question.
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