Physics-Aware Co-training to Overcome Device Non-idealities in Canted SOT-MTJ Arrays for In-Memory Computing

The physical non-idealities inherent in emerging spintronic devices, such as device-to-device variations, stochastic switching, and nonlinear conductance responses, pose fundamental challenges for their deployment in in-memory computing architectures. Here, we investigate the integration of canted spin–orbit torque magnetic tunnel junctions (SOT-MTJs) for deep learning applications and propose a hardware-aware deep learning framework that embeds into the training process experimentally extracted device characteristics, which are faithfully resolved via a dedicated three-terminal SOT testing scheme that effectively suppresses spin-transfer torque, halves the switching threshold voltage, and eliminates parasitic drifts to minimize measurement-induced fluctuations and reveal intrinsic 1010-cycle endurance, thereby directly facilitating robust hardware–software co-optimization. By tuning a normalized conductance factor gnorm, we achieve a median classification accuracy of 88.9% on the Wine dataset using a 13 × 13 SOT-MTJ array, surpassing baseline software-to-hardware weight mapping. Incorporating hardware-aware co-training further elevates the median accuracy to 94.4%, demonstrating substantial robustness against device imperfections. Overall, our results highlight that explicitly modeling device variability at both the physics and algorithm levels can enable spintronic hardware based on SOT-MTJ arrays to function as compact, energy-efficient neuromorphic platforms, allowing device stochasticity to be incorporated as a learnable constraint, ultimately recovering hardware inference accuracy to within a few percentage points of the ideal software baseline.