Experimental Realisation of Reversible Quantum Half Adder and Half-Subtractor on IBM Quantum Device with Coherence–Decoherence Noise Analysis

This paper presents reversible implementations of a half adder and a half subtractor suited for Noisy Intermediate-Scale Quantum (NISQ) hardware, described using a minimal gate set such as NOT(X), CNOT(CX), and Toffoli(CCX), and processed in a Qiskit-IBMQ codesign environment. The proposed circuits are compiled and evaluated on the IBM Quantum Brisbane backend. For each computational-basis input, the histograms of measured outcomes reveal a prominent peak consistent with the desired truth table together with non-ideal hardware contributions in the measured distribution. To extend the analysis beyond computational-basis inputs, the superposition state √︁1/3|0⟩+√︁2/3|1⟩ is prepared using a standard parameterized Ry(θ) rotation with θ = 1.910633 rad, and the resulting circuits are evaluated on the IBM Quantum Brisbane backend. Finally, circuit-conditioned relaxation and decoherence are characterized using effective T1 and T2 parameters obtained from exponential fitting, together with reduced-χ2 statistics to assess model consistency.