M0‑Composite Six‑Layer Controllable Memory System V2.0‑public

This is an independent personal architectural pre‑research preprint for M0‑Composite six‑layer controllable memory system, no production‑ready source‑code implementation is provided. Built upon Kuangchao System Architecture Meta‑Theory v1.0‑public, baseline marker: KUANGCHAO‑BASE‑V1P0‑ROOT‑R4. M0‑Composite is a composite memory architecture reconstructed by extracting advantages from M1‑M5 memory paradigms, introducing five isolation‑shield risk‑suppression layers. The top‑level hard constraint disables background silent LLM memory extraction; all memory writes must come from explicit Agent tool‑call or manual annotation. The design defines six‑layer storage hierarchy: working‑page, recall‑cache, fact‑graph, isolated‑memory‑vector‑store, cold‑archive, COW version‑audit layer. It adopts copy‑on‑write snapshot‑diff for version rollback; conflicting detected facts go into conflict‑queue waiting for review instead of auto‑invalidation. It provides mixed RRF multi‑source retrieval and progressive‑disclosure assembly. The document carries out full eight‑step forward analysis: module boundary scanning by permission‑atomization protocol, separation of status‑flow / execution‑flow, six dynamic‑contract verification, five‑category operating‑conditions analysis, component‑coupling analysis (prosper‑generate‑idle‑restrain‑destroy), conditional‑risk enumeration, alternative‑reconstruction schemes, closed‑loop review. Attached artifacts include hazard‑test‑parameter mapping, troubleshooting template, three‑way defect classification table. Twenty‑one sets of Mermaid flowcharts / sequence‑diagrams are embedded as architectural source‑codes. Disclaimer: Purely paper‑based architectural deduction, without real‑machine engineering verification. For technical exchange only, cannot be directly put into production. Not official product design of any organization.