Ein 48-Core IA-32 Nachrichtenaustauschprozessor mit DVFS in 45nm CMOS

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Ein 567 mm² Prozessor in 45 nm CMOS integriert 48 IA-32 Kerne und 4 DDR3 Kanäle in einem 6×4 2D-Mesh-Netzwerk. Die Kerne kommunizieren durch Nachrichtenaustausch mittels 384 KB on-die gemeinsam genutztem Speicher. Eine feingranulare Stromverwaltung nutzt 8 Spannungs- und 28 Frequenzinseln, um unabhängiges DVFS von Kernen und Mesh zu ermöglichen. Mit steigendem Durchsatz dissipiert der Prozessor zwischen 25 W und 125 W.

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Jason Howard

Intel (United States)

Saurabh Dighe

Intel (United States)

Yatin Hoskote

American Rock Mechanics Association

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Intel (United States)

DuPont (United States)

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Howard et al. (Mon,) haben diese Frage untersucht.

synapsesocial.com/papers/6a16041fc4bcdd6cffc5b47e — DOI: https://doi.org/10.1109/isscc.2010.5434077

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A family of 45nm IA processors· 2009 · 128 citations
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A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging· 2007 · 829 citations
Development of Mixed Mode MPI / OpenMP Applications· 2001 · 192 citations
A Family of 32 nm IA Processors· 2010 · 59 citations

Also consider

Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context:

A family of 45nm IA processors· 2009 · 128 citations
An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS· 2007 · 634 citations
A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging· 2007 · 829 citations
Development of Mixed Mode MPI / OpenMP Applications· 2001 · 192 citations
A Family of 32 nm IA Processors· 2010 · 59 citations

Ein 48-Core IA-32 Nachrichtenaustauschprozessor mit DVFS in 45nm CMOS

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