Experimental tests demonstrated multi-chip capabilities and power management for pixel sensors, indicating improved designs for future colliders.
High voltage CMOS pixel sensors are proposed in many future particle physics experiments such as the HL-LHC upgrades and future circular colliders. The ATLASPix3 chip consists of 49104 pixels of dimension 50 μm × 150 μm, realised in 180 nm HVCMOS technology. It is the first full reticle size monolithic HVCMOS sensor suitable for construction of multi-chip modules and supporting serial powering through Shunt-Low-Dropout regulators. The readout architecture supports both triggered and triggerless readout with zero-suppression. With the ability to be operated in a multi-chip setting, a 4-layer telescope made with ATLASPix3 was developed, using a readout system made at KIT. To demonstrate the multi-chip capability and for its characterisation, a beam test was conducted at DESY using 3–6 GeV positron beams with the chips operated in triggerless readout mode with zero-suppression. Detailed electrical characterisations of the regulators are presented as well as multi-chip (quad module) readout and serial powering prototyping.
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Andreazza et al. (2025) studied this question.
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