Wavelength division multiplexing on-chip parallel convolution processing core

In the era of rapidly advancing artificial intelligence (AI), traditional electronic computing architectures struggle to meet the growing demand for convolutional computing. Photonic computing, with its low power consumption, high parallelism, and ultra-high bandwidth, has gained significant attention. However, current photonic convolutional architectures are limited by the number of convolutional kernels and insufficient scalability. This study introduces a chip-scale parallel convolution processing core (PCPC) based on wavelength-division multiplexing (WDM) technology. In the simulation, by integrating WDM with a multi-core architecture that utilises a micro-ring array and cross-shaped waveguides, it is demonstrated that the architecture can perform efficient multi-core convolutional operations, thereby enhancing computing efficiency and scalability. Concurrently, we have implemented key modules on thin-film lithium niobate (TFLN) chips to support the development of on-chip architectures. It shows great potential in cutting-edge fields like intelligent perception, autonomous driving, and real-time data processing, and could strongly support the increasing computing demands of the post-Moore's era.