Plasma-enhanced atomic layer deposition improves mobility in IGZO TFTs, suggesting better performance for BEOL circuits.
Indium Gallium Zinc Oxide (IGZO) thin‐film transistors (TFTs) offer promising potential for next‐gen monolithic three ‐ dimensional (M3D) integrated chips due to their decent mobility, excellent electrostatic characteristics, and low‐temp processing. However, mobility in IGZO TFT is still underwhelming. Here, accurate modulation of the Indium (In) ratio via a plasma‐enhanced atomic‐layer deposition (PEALD) approach is investigated, together with a post‐deposition annealing (PDA) process over multiple temperatures. Through detailed material characterization, it is elucidated that a high In ratio with PDA favors more In─O bonding and reduction of defects state. While a higher PDA temperature results in a higher mobility, other electrical performance is degraded due to unwanted defects generation. Optimized IGZO (In (5): Ga (1): Zn (1)) TFT is obtained after a PDA of 350 °C with a significant enhancement in field‐effect mobility ( µ FE ) from 25.10 to 66.04 cm 2 V·s −1 . In addition, the TFT achieves other excellent electrical performance, including an I on‐off of 10 7 , low subthreshold swing (SS) of 79.25 mV dec −1, and threshold voltage ( V TH ) of −0.39 V. Building upon the optimized IGZO TFT, a n‐ IGZO TFT‐based pseudo enhancement load (PEL) inverter is presented, achieving robust rail‐to‐rail operation, thus demonstrating its suitability for integration in CMOS backend‐of‐line (BEOL) for high‐performance circuitries.
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Zhang et al. (2025) studied this question.
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