Adaptive Temperature‐Compensation of Charge‐Pump PLL–Based MTJ/CMOS for Frequency Stability

The charge pump phase‐locked loop (CP‐PLL) is a critical component in modern mixed‐signal electronics, widely used for clock generation, synchronization, and frequency synthesis in digital and wireless applications. However, its performance is significantly impacted by nonideal effects, particularly the current mismatch of the charge pump (CP) and the frequency variation of oscillator, both of which are highly sensitive to temperature fluctuations. To address these challenges, this work leverages the positive temperature coefficient (PTC) of the drain‐source on‐state resistance in CMOS and the negative temperature coefficient (NTC) of the magnetic tunnel junction (MTJ). Using 28 nm CMOS technology, we analyze and simulate the current mismatch of the CP across a wide temperature range, achieving a current mismatch of less than 0.3%. Furthermore, the proposed approach significantly improves the frequency stability of the ring oscillator. Simulation results validate the effectiveness of our design, demonstrating that the MTJ compensates for 90% of the output frequency drift over a temperature range from −80 to 125°C.