Enhanced Reverse Recovery Characteristics of 1.2 kV SiC MOSFETs with Integrated Low Schottky-barrier Poly-Si/SiC JBS and Deep p+ Guard Regions

We propose 1.2 kV Silicon Carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a monolithically integrated low Schottky-barrier poly-Si/SiC junction-barrier Schottky (JBS) diode and deep p+ guard regions. The n‑type poly‑Si anode (work function ≈ 4.03 eV) lowers the Schottky-barrier height by ~0.25 eV compared with conventional Ti/SiC contacts, thereby reducing the diode forward-voltage drop (VF) and reverse‑recovery loss. In order to suppress the increase in leakage and improve breakdown voltage (BV), we employed high-energy Al (≤ 700 keV) and formed deep p+ guards. The static and dynamic simulations show that the optimized device (WSchottky = 0.85 µm and Wp+ = 0.35 µm) exhibits a BV ≥ 1.3 kV and a specific on-resistance (Ron,sp) of 5.2 mΩ cm², while having a 32 % reduction in VF, a 15 % shorter reverse-recovery time (8.7 ns), and a 23 % lower peak reverse-recovery current compared with the SiC MOSFET with a Ti/SiC JBS scheme. These results verify that poly-Si/SiC JBS integration, combined with deep p+ guard structures, simultaneously reduces switching loss and preserves high blocking capability in 1.2 kV SiC MOSFETs.