Design of a high-resolution incremental photoelectric encoder processing system

Based on the erasable FPGA, a dual-header incremental photoelectric encoder processing system is designed, including the hardware circuit part and the FPGA software part. The system improves the resolution by software subdivision. Through the FPGA real-time inverse trigonometric function algorithm, the 11-bit subdivision of the single precision code period is realized, and the data output of 22 bits of high resolution is achieved. The eccentricity error can be eliminated, and the accuracy of the photoelectric encoder can be improved by averaging the data of the dual read heads. According to actual measurements, the accuracy is ± 9 arc seconds, which meets the system design requirements and can be used in high-resolution and high-precision occasions.