Trade-Off between Thermally Induced Crystallization and Oxide Integrity for DRAM Application

In this study, to fabricate capacitors for dynamic random-access memory (DRAM), we employed high-k materials to ensure capacitance while maximizing the thickness of the thin films, and multidielectric layers were deposited to mitigate tunneling and leakage current. After depositing the target thickness, the properties of the high-k dielectric layers (which may undergo alterations during the subsequent thermal processing) were analyzed by measuring their electrical characteristics. We developed a methodology for the structural interpretation of multidielectric layers and elucidated the conduction mechanism through oxide integrity, electrical characteristic measurements, and energy band analysis. Furthermore, physical analyses were conducted to corroborate the results obtained from the electrical characteristic assessments. By addressing the inherent trade-off between thermally induced crystallization and oxide integrity, typically required for optimal DRAM performance and essential for optimization, this study offers a promising strategy for advancing the development of high-performance semiconductor devices.