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A Physical Unclonable Function Based on a Differential Subthreshold PMOS Array with 9.73 × 10−4 Stabilized BER and 1.3 pJ/bit in 65 nm

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This analysis reveals a PUF with a stabilized bit error rate of 9.73×10−4 in various conditions, suggesting enhanced reliability.

A stabilized bit error rate of 9.73×10−4 is achieved, enhancing the PUF's reliability across varying conditions.
The implementation of majority voting significantly reduces error rates to below 3.12×10−9 at 1.2 V and 25 °C.
This research employs a differential PMOS array, integrating a dynamic comparator to mask unstable bits effectively.
Under various supply voltages and temperatures, the native error rate is reduced to 9.73×10−4, achieving high efficiency.

Zambrano et al. (2025) studied this question.

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View Full Paper

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Authors

This analysis reveals a PUF with a stabilized bit error rate of 9.73×10−4 in various conditions, suggesting enhanced reliability.

A stabilized bit error rate of 9.73×10−4 is achieved, enhancing the PUF's reliability across varying conditions.
The implementation of majority voting significantly reduces error rates to below 3.12×10−9 at 1.2 V and 25 °C.
This research employs a differential PMOS array, integrating a dynamic comparator to mask unstable bits effectively.
Under various supply voltages and temperatures, the native error rate is reduced to 9.73×10−4, achieving high efficiency.

Zambrano et al. (2025) studied this question.

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