This work presents an all-digital time-mode subthreshold temperature sensor for monitoring SoC self-heating problem. The sensor incorporated a low-power differential inverter interlaced cascaded delay cell followed by a gated ring oscillator with different temperature coefficients of [Formula: see text]1736.10 and [Formula: see text]5880.33 ppm/ ∘ C, respectively. The differential inverter interlaced cascaded delay cell and XOR gate produce a temperature-dependent large delay pulse, whereas the gated ring oscillator produces temperature-dependent output code for each point of temperature within the delay pulse generated by the differential inverter interlaced cascaded delay cell and XOR. The corresponding temperature code is recorded by an asynchronous counter. At 90-nm CMOS process and 0.6/0.3[Formula: see text]V supply voltage Vdd, the sensor occupies 0.009[Formula: see text]mm 2 and consumes only 876[Formula: see text]nW at 27 ∘ C. The sensor has a sampling rate of 52.16[Formula: see text]KS/s and the resolution is noted to be 0.40 ∘ C for a temperature span of 0–100 ∘ C. Besides, the proposed design achieves a very small energy/conversion of 17 pJ, which ensures 2.72 pJ[Formula: see text][Formula: see text][Formula: see text]C 2 and 0.13 nJ% 2 resolution FoM and inaccuracy FoM, respectively.
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Chakraborty et al. (2024) studied this question.
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