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The Modified Advanced Encryption Standard (MAES) emerges as a robust solution tailored for the unique challenges posed by Internet of Things (IoT) applications. In this paradigm, where resource constraints and energy efficiency are paramount, MAES optimizes the Advanced Encryption Standard (AES) to meet the specific demands of IoT devices. This modification involves a judicious trade-off between security and computational complexity, ensuring a delicate balance suitable for the constrained nature of IoT environments. MAES not only maintains the formidable security features of AES but also introduces tailored enhancements that cater to the low-power, low-memory, and high-throughput requirements of IoT devices. This abstract highlight the crucial role MAES plays in fortifying the security landscape of IoT, making it a compelling choice for safeguarding sensitive data in the era of interconnected and resource-limited devices. The test case bits will be used to pick the module. The key and input will then be chosen in accordance with the test case bit selection, and the module will generate the corresponding output and lower the clock cycles to 16 with 149.721W power dissipation. Verilog code was used to generate the MAES algorithm, which was intended for FPGA. Vivado tool is utilized for Synthesis and Simulation. The KINTEX-7 FPGA has successfully tested the design.
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Naik et al. (2024) studied this question.
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