Memristors Development and In-Memory Computing Architecture

With the development of neural network, Von Neumann's bottleneck is hanging over heads. The emergence of memristor and computing in memory architecture has greatly improved data processing speed and energy efficiency. This review provides a brief literature review of memristors, focus on development, and provide applications, challenges, and prospects of memristors. Firstly, the process of memristor research is introduced. Secondly, this paper highlights memristors development, which is divided into three time periods: 2008 before, 2008 to 2013, and 2013 to 2018. In 1971, Cai Shaotang predicted the existence of memristors. The Stan William team of HP Laboratory first prepared a memristor through experiments in 2008. In 2015, UCSB used a 12 times 12 array to realize the recognition of three letters. Memristor optimization work of the Tsinghua University team is introduced. Thirdly, this paper discusses the applications, and challenges of memristors and gives useful advice on optimization work in the future. Application is divided into 3 parts. In addition to many other difficulties in circuit and system designs, memristive neural networks require much larger array sizes and peripheral circuit integration with computing kernels for maximum energy and throughput efficiency in order to be used for more complex computing tasks.