Low Thermal Budget Fine-pitch Cu/Dielectric Hybrid Bonding with Cu Microstructure Modifications

Advanced packaging featuring vertical integration has emerged as a crucial technology facilitating high performance, low power consumption, and compatibility for heterogeneous integration. Metal/dielectric hybrid bonding stands out as a pivotal technique enabling the vertical stacking of multifunctional components. However, certain applications, such as memory stacking, demand specific low-thermal budget processing. Although new dielectrics like SiCN are promising for reducing the thermal budget of dielectric-to-dielectric bonding interfaces, the formation of metal/Cu-Cu interconnects requires a higher thermal budget. Consequently, the overall thermal budget for Cu/dielectric hybrid bonding exceeds 350 °C. This paper aims to achieve Cu/dielectric bonding at a lower thermal budget of ⩽ 250 °C. This goal is accomplished by modifying the Cu microstructure through grain size variation employing the modifications into the conventional damascene process flow or with a combination of both. Systematic investigations in Cu dishing, by comparing the proposed methods to the conventional damascene flow reveal no variations with the chemical mechanical planarization (CMP) process. Furthermore, grain modifications with high <111> oriented Cu were investigated by altering the plating parameters without special chemistry or by using an alternate deposition method. The scanning electron microscopy-electron backscatter diffraction (SEM-EBSD) is utilized for understanding the Cu microstructure modifications. Interface characterization demonstrates significant enhancement in bonding interface grain growth with our proposed methods, leading to low thermal budget Cu/dielectric hybrid bonding.