A Selective Deposition Strategy of Ultrathin Metal Layer on Sub‐Micrometer‐Pitch Cu Interconnection for Low‐Temperature Hybrid Bonding

The advancement of high‐performance, miniaturized electronic systems continues to drive the development of advanced semiconductor packaging technologies with high bandwidth and integration density. Among these, sub‐micrometer‐pitch Cu interconnection via Cu/SiO 2 hybrid bonding has become a critical technique for achieving vertical chip stacking in 3D integration. However, CuCu direct bonding often requires process temperatures exceeding 400 °C to facilitate the metal diffusion, which poses challenges in back‐end‐of‐line compatibility and thermal stress management. In this study, a thermally efficient hybrid bonding method based on electroless deposition (ELD) of metal is presented, enabling interconnect formation at significantly lower temperatures. Ultrathin metal interlayers of gold (Au), platinum (Pt), and tin (Sn) (10–40 nm) are selectively deposited on 500 nm Cu pads using a solution‐based process, ensuring no impact on the adjacent SiO 2 dielectric layer. The bonding process involves vacuum pre‐bonding at 120 °C, followed by annealing at 250 °C, achieving strong CuCu diffusion and void‐free interfacial formation. This selective ELD‐assisted bonding method provides control over interface chemistry and ensures robust dielectric bonding through complementary surface silylation. The proposed process offers a scalable, low‐temperature pathway for fine‐pitch hybrid bonding, providing a promising solution for next‐generation ultradense 3D integrated semiconductor packaging.