High Performance 3D Package Technology for Mobile Application Processor (AP)

3D heterogeneous chip integration is suggested to overcome 2D conventional package limitation. CoW (Chip on Wafer) with TSV (Trough silicon via) is the essential technology for various advanced package platforms such as 2.5D, 3D, and System in package (SiP). In this study, thermal compression bonding (TC-Bonding) with pre-applied underfill material was used for wafer level chip assembly. Optimum underfill volume and fluid behavior during TC-Bonding was engineered successfully based on fluid dynamic simulation and self-designed mathematical equation. According to these studies, fine bump pitch assembly was accomplished by solder sweep suppression. Underfill material coverage was also improved to minimize keep out zone (KOZ) for 3D IC bump pattern design flexibility. Moreover, fillet size was minimized to 4.2% of top chip area and the assembly yield over 97% was achieved. In study, 3D CoW process over 100k bump counts with 25um bump pitch was successfully demonstrated and TC bonding process window was secured even without experimental result.