Scaling of solid-state quantum bits requires more and more complex connectivity schemes within two- or three-dimensional architectures. In that context, superconducting interconnects appear essential to tackle the associated challenges of compactness, thermal management and signal dispersion. We report on the fabrication of a two-level superconducting backend-of-line (BEOL) using 200 mm Si wafer technologies. This BEOL is made with two NbN routing layers connected through planarized Nb-based plug vias, made using standard damascene techniques with a two step chemical mechanical polishing. Wafer-level parametric tests are used to assess the quality of the technology at room temperature and die-level low temperature electrical measurements in a cryostat are performed to evaluate the BEOL and more specifically the via superconducting properties. The vias are characterized with a critical temperature ≥ 6.4 K, a critical magnetic field of ≈ 3.6 T and a critical current of 9.6 mA at 2 K and 0 T was evaluated for a 25x25 via array. Additionally, low temperature radio-frequency measurements at 9 K validate the stability of the via resistance up to a few GHz.
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Thomas et al. (2024) studied this question.
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