This is the authors' abstract. We don't add key points for this paper.
In this work, interconnects between Optical Engine (OE) and switch in a Co-Packaged Optics (CPO) architecture are characterized. The OE is fabricated in Fan-Out Wafer Level Package (FOWLP) with vertical interconnects Through Mold Via (TMV) routing the signals from the frontside of FOWLP to backside and then to the package substrate RDL which connects the switch. RF performance of TMV interconnects is characterized with double-side prober which directly measure the frontside and backside of TMV interconnects. The full signal path from OE to switch is characterized and PAM4 eye diagrams at 112Gbps and 224Gbps are generated with clear eye openings.
No takes yet. Share an insight, caveat, or question.
Wu et al. (2024) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: