IEEE Std. 1687 (IJTAG) introduces reconfigurable scan networks that implement an effective test access in highly complex designs. Designing an optimized network, that provides access to the instruments, meets the non-functional constraints, and preserves a minimized routing effort, area overhead and test access time, forms a non-trivial optimization problem. This paper tackles the IJTAG network topology design challenge by proposing an evolutionary approach to synthesize reconfigurable scan networks with optimized routing and area overhead while minimizing the overall test time.
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Habiby et al. (2024) studied this question.
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