Advanced Package Decoupling Study for Power Integrity Optimization of High-End Digital Devices

In the context of power integrity optimization for high-end digital devices, integration of decoupling capacitors on BGA (Ball Grid Array) packages is becoming a critical aspect. With increasing requirements in terms of functions integration and power consumption, combined with lower noise margins, miniaturization and cost reduction, a deep analysis is needed to achieve the maximum improvement at all the levels of the system (package, die, application board). This paper describes a methodology to optimize package decoupling, starting from a large capacitors portfolio and progressively reducing the options while moving from the frequency-domain to the time-domain analysis. As second step, the use of alternative technologies to reduce the parasitic inductances and improve the decoupling effectiveness is explored. Part of the work is to identify the boundaries of package decoupling effectiveness, beyond which other portions of the system (die or board) must be involved in the optimization process.