In this paper, we proposed a deep reinforcement learning-based design method that provides decoupling capacitor (decap) arrangement approaches on 2.5D integrated circuit (2.5D-IC) designs. The proposed method provides a guideline of decap design to reduce the influence of simultaneous switch noise (SSN). We consider the multi-chiplet design, the capacitors placement constraint, and cost of capacitors when optimizing the power delivery network (PDN) impedance. This method achieves 24% less capacitor requirement when compared to the traditional algorithm.
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Feng et al. (2024) studied this question.
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