The omission of slow gate-induced electron trapping from compact models significantly weakens their accuracy when utilized in the design of GaN-based robust low-noise and pulsed power amplifiers (PAs). Given the highly negative gate voltage and diverse off-periods inherent in these systems, providing an accurate description of trap time constants becomes paramount. This study deals with this problem by introducing a novel trap implementation suitable for large-signal models, particularly well-suited for those based on physics. Following the Shockley–Read–Hall (SRH) statistics, the proposed model emulates the bias and temperature dependencies of the trap time constants. Furthermore, the inclusion of new model parameter scaling functions covers a broad range of biases. The final model excels in accurately reproducing slow gate-induced and fast drain-induced electron trapping. Rigorous simulations of drain current recovery measurements under various conditions validate the high performance of the proposed trap description. Finally, the study calculates and presents electron capture time constants for gate and drain lag.
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Beleniotis et al. (2024) studied this question.
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