A Low-Power Timing-Error-Tolerant Circuit by Controlling A Clock

There is a lot of focus on timing inaccuracy right now because of how often errors happen on semiconductors. This is due to the fact that modern semiconductors run on relatively low supply voltages and high frequencies, making the timing buffer between successive clocks vulnerable to external disturbances of even a small magnitude. The problem of a timing inaccuracy has been extensively addressed by developing various methods. To address timing issues, however, most current methods use overly complex operations and time-delaying devices. This causes hardware overhead to rise and causes clock-based systems to have timing issues. In this piece, we provide a novel method that is tolerant of timing errors and has the ability to instantly repair a timing error by utilizing a straightforward process. The proposed system is able to recover from a timing error when compared to the clock-based system since it modifies a clock that is contained within a flip-flop. Instantaneous recovery with little hardware overhead is possible with the proposed approach, in contrast to existing timing-error-tolerant systems. This is because the proposed system features a compact mechanism. The proposed circuit was subjected to rigorous simulation in order to test our strategy by attending to fluctuations in PVT. Additionally, it was made a part of a number of benchmark designs, one of which being a microprocessor.