A Comprehensive Investigation of GaSb/GaAs0.5Sb0.5/GaAs based Double Gate Source-Pocket Engineered Heterogeneous Gate Dielectric Vertical TFET for Optimized Low-Power Applications

Recognizing the simplified fabrication and advanced performance of Vertical Tunnel Field Effect Transistors (VTFET) compared to Lateral TFET, numerous research has been con-ducted. In this study, a comparative analysis was performed on two double gate heterojunction source-pocket engineered VTFETs with and without heterogeneous cascaded gate dielectric using ATLAS SILVACO TCAD software. Highly doped <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GaSb</tex> as source intensifies the tunneling rate. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GaAs0.5</tex> Sb <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</inf> as source pocket reduces lattice mismatch and increases <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Iₒₙ</tex> . The research indicates that using High-k and & Low-k thick gate dielectrics at source and drain ends reduces average subthreshold swing <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(SSavg)</tex> , enhances transcenductance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(gₘ)</tex> , and amplifies <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Iₒₙ/Ioff</tex> ratio exponentially. This research examines Analo <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">yRF</tex> and DC performances of VTFET to optimize crucial device parameters. The heterogeneous gate dielectric structure incorporating <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">HfO₂</tex> showed an improved <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Iₒₙ</tex> of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1.1× 10⁻⁵A/μ m</tex> , diminished leakage current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ioff</tex> of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1.05× 10⁻¹⁷A/μ m, SSavg</tex> of 19.6 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mV/dec</tex> , highest <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Iₒₙ/Ioff</tex> ratio of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1.04× 10¹²</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gₙₗ</tex> of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">45μ S</tex> . The analysis revealed that the study is appropriate for assessing low-power applications with increased performance and also has a great potential for broadening the realm of vertical TFETs.