Electroplating In article number 2400092, Xiuling Li and co-workers introduce a strain-induced self-rolled-up membrane (S-RuM) platform that presents a CMOS-compatible solution for extreme miniaturization and on-chip integration of passive components including inductors and capacitors. By employing post-rolling electroplating on both the walls and core of the curved surfaces of S-RuM inductor arrays, enhancements to the quality factor and inductance can be achieved without sacrificing footprint.
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Yang et al. (2024) studied this question.
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