An Optimized Zero-CM PWM for Symmetry and Suppression of Circulating Current in Paralleled Inverters Applied to AC Motor Drives

Bearing current or common mode (CM) leakage current induced by high-frequency CM voltage have long posed challenges for AC motors fed by power electronics inverters. This paper focuses on the optimization of zero-CM PWM based on paralleled inverters, which can theoretically eliminate CM voltage. For the original zero-CM PWM method, it suffers from a significant issue related to circulating current asymmetry and current jumping problems. These issues amplify the peak value and the low-order harmonics of circulating current, which can significantly increase the design burden of coupled inductors. To address aforementioned challenges, this paper introduces an optimized zero-CM PWM strategy. During the two adjacent switching cycles, it leverages the freedom of vector time allocation in the first and second switching cycle. The volt-second balance can be achieved over two switching cycles, and the voltage vector sequence can be redistributed for the purpose of symmetry and suppression of circulating current. The proposed method not only maintains the CM voltage elimination, but also exhibits excellent circulating current suppression without any additional hardware cost. Finally, both theoretical analysis and experimental validation are presented to demonstrate the effectiveness of proposed method.