ASICs in outer space operate in harsh environments. With limited energy supply for operation and cooling, being exposed to intense hot and cold environmental circumstances, junction temperatures may vary frequently and significantly. At the same time, radiation from various sources continuously interferes with normal circuit operation. Total Ionizing Dose (TID) causes material degradation, changing the behavior of technology cells. Single Event Effects (SEE) cause spurious transient behavior and may even lead to permanent upsets or latch-ups. To mitigate such effects, a special ASIC design methodology is required. We will address different techniques, varying from cell-level hardening up to application-level redundancy and error recovery, and show how aerospace-grade radiation-hardened ASICs can be developed with commercial foundry technology.
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Marcel Van De Burgwal (2024) studied this question.
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