The Layer Transfer Technology of Ge for Advanced CMOS

Since continuous scaling of device dimension pushed Si channel to its physical limit, Ge channel is an effective way to enhance the performance and efficiency of CMOS. In the meantime, nanosheet or multi-stacked channels are the compulsory structure for improved gate control and immunity against short channel effects in the ultimately scaled highperformance and low-power dissipation CMOS. Therefore, the layer transfer technology of Ge onto Si has attracted a lot of attention. To realize Ge stacked channel on current mainstream Si wafers, layer transfer technology utilizing direct bonding and selective etching was developed, showing great potential for ultimate device structures with evolutionary device architecture from fin to complimentary FET. Key challenges still remain about maintaining the material quality of transferred layers from the donor wafer to the fabricated structure and how to fabricate high-performance devices under low-thermal budget processes on Si. In this talk, we discuss the layer transfer technology for integrating Ge devices for advanced CMOS.