TCAD Analysis of Si/SiGe Superlattice Channel in 2nm Gate-All-Around FETs

In this work, Si/SiGe superlattice (SL) structures are introduced as channel materials in gate-all-around field-effect transistors (GAAFETs) targeting the 2 nm technology node, and their performance is systematically benchmarked against that of conventional Si channel device. Device design and performance analysis were conducted using Sentaurus TCAD. To investigate the impact of different Si and SiGe layer thickness combinations in SL channels, nine different Si/SiGe SL configurations were considered. Simulation results indicate that, compared with conventional Si channels, SL channels can significantly enhance the drive current, ON-OFF current ratio (ION/IOFF), and maximum transconductance (Gm,max), while effectively reducing the off-state current (IOFF), subthreshold swing (SS), and drain-induced barrier lowering (DIBL). These improvements demonstrate superior short-channel effect suppression, and device performance can be further optimized by adjusting the thicknesses of the Si and SiGe layers. Overall, the proposed Si/SiGe SL channel shows strong potential for application in advanced 2 nm technology nodes.