High-resolution, low-latency, and low-power capacitance-to-digital converters (CDCs) have drawn increasing attention due to their extensive usage in emerging loT applications, such as electronic capacitance tomography and robotics. Several architectures have been explored. The SAR-based CDC realizes high energy efficiency, but its resolution is usually limited [1]. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ΔΣ</tex> modulators suit well for high-resolution applications thanks to the quantization noise shaping. However, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DT-ΔΣ Ms</tex> still suffer from sampling kT/C noise [2]. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CT-ΔΣ Ms</tex> achieve high resolution with the mitigation of sampling operation and sufficient OSR [3], [4]. However, they cannot support single-shot measurement and usually suffer from ELD issues, leading to high measurement latency and stability concerns. Recently, the time-domain (TD) quantization architectures become popular for their high energy efficiency [5], [6]. The <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SAR-TDΔΣ M</tex> combines the efficient SAR quantization with the accurate zoomed time-domain operation, offering state-of-the-art energy efficiency. Yet, further performance improvement is limited by the sampling noise and the 1 st-order noise shaping.
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Shen et al. (2024) studied this question.
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