In the harsh environment of field applications, the I/O pins of integrated circuit (IC) must be verified through latch-up test with current trigger, according to the standard of JEDEC JESD78F.01. This work presented a specific latch-up challenge encountered in an IC product, where a multi-functional I/O buffer is designed for LCD drivers. Such a multi-functional I/O buffer suffered a failure in latch-up (LU) I test, due to the indirect connection on the N-well of output PMOS to the power supply through a bias switch. To address this LU failure issue, this work thoroughly examines the failure mechanism and proposes an innovative solution. By using an embedded deep-nwell collector, the latch-up immunity of multi-functional I/O buffer with indirect power-connected N-well can be significantly improved.
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Hsu et al. (2024) studied this question.
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