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Semiconductor technology constantly advances, enabling integrated circuits (ICs) with increasingly numerous, faster, and smaller transistors. While this progress offers many benefits, it also presents new challenges, such as tighter margins, wear-outs, and process variations. To effectively tackle these challenges, the conventional approach of using external test instruments during manufacturing testing must be complemented with on-chip instruments. These on-chip instruments facilitate the detection of defects that emerge over the operational lifetime of the IC. Accessing on-chip instruments poses a challenge. We will discuss traditional test access method (IEEE Std. 1149.1 (JTAG)), reconfigurable scan networks (IEEE Std. 1687 (IJTAG)) and ongoing developments using functional ports to access test instruments (IEEE Std. P1687.1 and IEEE Std. P2654).
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Erik Larsson (2024) studied this question.
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