Achieving synchronization in multi-channel transmit and receive systems has traditionally involved complex length-matched channel designs, posing challenges, particularly in higher-order channels. This paper introduces an innovative approach to multi-board synchronization of n-channel direct RF digital transceivers utilizing the high-speed serial JESD204 protocol, which leverages RF PLLs, high-speed serial DACs, and ADCs. The synchronization technique discussed herein significantly impacts digital beamforming (DBF) in active phased array RADAR systems. Instead of relying on a matched device clock or SYSREF signal, the proposed method employs phase delay calculation and PLL reprogramming to adjust phase differences among channels.Synchronization is accomplished through online phase delay calculation within the FPGA using cross-correlation techniques between channels. Notably, this approach eliminates the need for a matched device clock or SYSREF signal, thereby reducing PCB complexity. Results underscore the method's efficacy, making it an efficient solution for active phased array RADAR systems, while a new method has been explored to analyze the impact of random phase changes on digital beamforming.
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Nirbhay Singh (2024) studied this question.
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