Experimental measurements show a 27% stress reduction in ICs with low-stress encapsulation, indicating significant FEM reliability in stress prediction.
We have examined the use of the ATC04 piezoresistive Assembly Test Chip for measurement of the die surface stresses produced by liquid plastic encapsulation of an integrated circuit mounted directly on a ceramic substrate. In our experiment, two groups of parts, each with about 70 samples, were encapsulated with two different materials, one a standard and one a low stress formulation. Results are presented for the measured stress components; σxx – σzz, σxy, and σxx – σyy. We observed an ≈ 27% reduction in the compressive stress between the normal stress and low stress materials, and a small but measurable difference in the average in-plane shearing stress. A detailed finite element model (FEM) was developed for prediction of the stresses in our experiments. The model calculations demonstrated that the die surface stresses after die attach and after encapsulation were very sensitive to the substrate bending state. The measured spatial stress distributions after encapsulation were in reasonably good agreement with the FEM predictions with substrate bending allowed. Detailed comparisons between FEM predicted and experimentally measured stress components are made. In most cases, good qualitative or semiquantitative agreement is found, but there are several significant differences between experiment and FEM theory. We conclude that validation of a FEM of an IC package requires improved knowledge of constituent elastic properties together with knowledge of the substrate bending state during measurement.
No takes yet. Share an insight, caveat, or question.
Sweet et al. (1995) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: