Integrating Data Protection at Interface of RISC-V Processor Core

Fulfilling increasing performance demands of space and automotive applications can be problematic as high dependability is required. Memory is one of the most radiationsensitive parts, so it is often protected with information redundancy. This paper describes an integration of error correction and detection techniques into the interface of RISC-V processor to protect the data stored in the memory. We also provide a hardware-software interface for reporting errors and software routines for correcting data in memory. Our solution has a negligible impact (-3.9%) on the overall performance of the core with a small area and power consumption overhead.