1.4-8 Gb/s Low Power Quarter-Rate Single-Loop Referenceless CDR With Unlimited Capture Range

This paper describes a low power quarter-rate single-loop clock and data recovery circuit (CDR) without a reference clock. A new frequency acquisition method is proposed, featuring unlimited frequency capture range and a short locking time. The proposed CDR has been designed and fabricated in a 28nm CMOS process, and measurement results show a capture range of 1.4Gb/s to 8Gb/s over the full voltage-controlled oscillator (VCO) operating range, with a locking time of approximately 1.37μs. The power efficiency is 0.71 pJ/bit at 8Gb/s input data.