Fabrication Process Improvement of Aggressively Scaled Dual-Bit/Cell Split-Gate Floating-Gate Flash Cell

A novel method was proposed to optimize the fabrication process of the aggressively scaled non self-aligned split-gate floating-gate (FG) NOR-type Dual-bit/cell (NORD) flash cell. The improvement method solved the issue of the overlay shift between two times of lithography, which results in the asymmetry FG and control gate (CG) between the two bits in one cell. The cell well implant and lightly doped drain (LDD) implant have been modified to make sure the device performance can match that of conventional cell. The technology computer-aided-design (TCAD) simulation results suggest that the changes in gate lengths don't cause declines in device characteristics and even better performance in readout window and program efficiency, which confirms the feasibility of the fabrication process improvement method.