This work proposes a novel resistive random-access memory (RRAM)-based ternary content-addressable memory (TCAM) array architecture utilizing a Pt/Ta2O5/ZnO/Cu memristive device structure. A compact behavioral model for the memristor is developed based on experimental I-V characterization. A 2T2R cell design is presented leveraging the RRAM device as the storage element co-integrated with CMOS access transistors. An entire TCAM array is designed by arranging the 2T2R cells in a matrix structure. The content search operation is validated through circuit-level simulations using a commercial tool (Virtuoso). Compared to conventional CMOS-only implementations, this proposal offers advantages such as reduced layout area and static power consumption due to the non-volatility of resistive switching memory and is compatible with front-end CMOS processes. This work demonstrates the feasibility of utilizing RRAM devices to implement low-power TCAMs, paving the way for future energy-efficient in-memory search applications.
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Wang et al. (2024) studied this question.
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