A Novel Method to Improve Sidewall Protection by Adopting Nested Bosch Process

With the continuously shrinking of the critical dimension of CMOS, the traditional Moore's Law start to slow down, three-dimensional integrated circuits from the perspective chip packaging solutions have attracted great research attentions. Among the advanced etch structures adopted in 3-D chip package, one of the most important structures is the Through-Si-Via (TSV). In this paper, the etching process of TSV, which has greatly increased the sidewall protection strength during the etching process, is studied to enhance the anisotropy of etching, improve the process limit, increase the process window, and process stability.