Quantum Transport through a Constriction in Nanosheet Gate-all-around Transistor

Abstract In nanoscale transistors, quantum mechanical effects such as tunneling and quantization significantly influence device characteristics. However, large-scale quantum transport simulation still remains a challenging field, making it difficult to account for quantum mechanical effects arising from the complex device geometries. Here we report the “quantum access resistance (QAR)” at the constriction as a hidden key bottleneck of the gate-all-around (GAA) transistors. Based on the non-equilibrium Green’s function (NEGF) formalism, we observe strong carrier reflection at the junction of bulk source/drain (S/D) and nanosheet (NS) channel, which substantially degrades the device performance. Various scenarios for the device shape, scattering rate, and doping profile demonstrate the peculiar device operations. We also evaluate the QAR in the realistic stacked NS GAAFETs with highly-parallelized 2/2.5 dimensional simulation. It is revealed that the complex geometrical effects result in several unusual phenomena and unique device optimization strategies. We propose that the dog-bone-shaped NS extension, with moderate contact depth, can maximize the carrier injection and device performance. As our results yield reliable on-current compared to the hardware data, full quantum simulation is readily applicable to the realistic device optimization, shifting the paradigm in design of future technology nodes.