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June 3, 2026Scientific ReportsOpen Access

Performance analysis of electrostatic and transport characteristics of underlap-engineered gate-all-around carbon nanotube (CNT) FETs for nanoelectronics circuitry applications

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The study aims to analyze the performance of underlap-engineered gate-all-around carbon nanotube FETs for nanoelectronics applications.
Developed cylindrical GAA CNT FET using semiconducting zig-zag (19,0) nanotube channel.
Introduced various underlap lengths from 0 to 5 nm across six device configurations (Devices A–F).
Performed self-consistent quantum transport simulations based on the NEGF formalism.
Optimized 3 nm underlap device (Device D) shows a 50.7% reduction in off-state leakage current compared to Device A.
Device D improves subthreshold swing by 23.7% and suppresses drain-induced barrier lowering by 26.5%.
Enhancement in switching ratio by 84.5% with minimal degradation in drive current.

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Implication

Randomized trial evaluates electrostatic and transport performance in underlap-engineered CNT FETs, suggesting advancements for nanoelectronics applications.

Cite This Study

Bose et al. (2026) studied this question.

synapsesocial.com/papers/6a1fc40fdee9eb8c0dce5ae3 https://doi.org/10.1038/s41598-026-55195-4

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Implication

Randomized trial evaluates electrostatic and transport performance in underlap-engineered CNT FETs, suggesting advancements for nanoelectronics applications.

Performance analysis of electrostatic and transport characteristics of underlap-engineered gate-all-around carbon nanotube (CNT) FETs for nanoelectronics circuitry applications

Key Points

Discussion

Implication

Cite This Study

Performance analysis of electrostatic and transport characteristics of underlap-engineered gate-all-around carbon nanotube (CNT) FETs for nanoelectronics circuitry applications

Key Points

Discussion

Implication

Cite This Study

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