A high-linearity 19 GHz LC-based VCO circuit with PVT compensation was designed, which can achieve a low-jitter high-quality clock signal. Cross-coupled PMOS-NMOS structure with two additional adjustable voltages was used to compensate for the effect of process, voltage and temperature (PVT) on the operating frequency and improve the linearity of voltage-controlled characteristic. Simulation results show that the proposed VCO can achieve the wider frequency of 18.7-19.5 GHz and exhibit the phase noise of -109.458 dBc/Hz at the frequency offset of 1MHz. And when the output frequency is 19GHz, it takes 0.4us to generate the stable clock signal, whose jitter is less than 0.22 UI.
No takes yet. Share an insight, caveat, or question.
Li et al. (2024) studied this question.
Synapse has enriched 5 closely related papers on similar clinical questions. Consider them for comparative context: