Low Power and 72dB High Gain Op-Amp Design in 0.18\ μ m CMOS Process

Design of a general purpose two stage Miller compensated Operational Amplifier (Op-Amp) using 180nm CMOS technology has been presented in this paper. The presented design offers a high dc gain of 72dB, Unity Gain Bandwidth of 51MHz for a large load capacitance of 1 pF and Phase Margin of nearly 60° while consuming a small power of nearly <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">280</tex> . In addition, our Op-Amp offers a CMRR of nearly 80dB, PSRR of greater than 85dB, Slew Rate (SR) of greater than <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">30V/μˢ</tex> and Input Common Mode Range (ICMR) of 0.53V – 1.37V. Simulation results show that the proposed Op-Amp offers a potential used in the design of voltage regulator, active filter, comparator and data converters etc.