Design of Two Stage Miller Compensated CMOS Opamp with Nulling Resistor in 90nm Technology

Operational amplifier is considered to be the fundamental block mixed signal and analog design. This paper aims to design a two stage CMOS operational amplifier using Miller Compensation technique with a nulling resistor, mainly to achieve high gain with relatively good bandwidth and phase margin with low bias currents in 90 nm technology. Keeping this as a main aspect, Opamp specifications are taken into account, i.e., Differential Mode gain, common mode gain, phase margin, slew rate, power dissipation and gain bandwidth. This design operates at 1.2V to 0V half voltage supply swing. The simulation process is carried out in Cadence Virtuoso in 90nm node technology. The obtained DC gain is 68db with phase margin of 80 degree and a slew rate of 9 V/µSec with a power dissipation of 33µW.