In this work, we propose a novel compact wideband high-order all-pass-filter (APF) topology for use as an analog delay circuit. This topology avoids conventional cascading, which degrades bandwidth and increases power consumption. It consists of a common-source transistor and a passive impedance network whose order can be increased via a passive-impedance-network extension. To increase bandwidth and reduce circuit area, the network inductors are reduced by a factor of N2, where N is the Norton-transformation coefficient. The viability of the topology is experimentally demonstrated with a single-stage 5th-order APF, which exhibits a delay of 75 ps with a 10% bandwidth from 0 to 16.4 GHz. The 65-nm-CMOS 5th-order APF occupies only 0.046 mm2 and draws 1.92 mA from a 1.3-V supply.
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Kabirkhoo et al. (2024) studied this question.
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