Regular expression matching based on FPGA has been widely used in many fields due to its high efficiency. However, FPGA hardware resources are limited, so it is necessary to optimize the utilization of circuit resources by minimizing the number of components and memory resources. When the regular expression has repeated qualification rules and range matching rules, the syntax tree generated by Mcnaughton's MY algorithm is too long, resulting in the mapped circuit structure being too complex. An improved algorithm based on list storage is presented, which can effectively solve the resource waste caused by repeated qualification and range-matching rules. The implementation process of the MY algorithm was initially introduced in this paper, and the stored table algorithm was proposed. Subsequently, the circuit mapping algorithm was extended, and the accuracy and resource consumption of the algorithm was simulated using the Vivado platform. It is indicated by the results that the resource consumption caused by the repeated constraint rule "{}" and the range matching rule "[]" can be effectively reduced by the list storage algorithm, with the most resource-saving rule achieving up to 95% resource savings.
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Liu et al. (2024) studied this question.
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